1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a semiconductor device having an interconnection structure preventing breaking of interconnection due to stress being applied to a semiconductor substrate after mounting thereof.
2. Description of the Background Art
In recent years, there exist increasing demands for more compact and more lightweight electronic components such as mobile telephones and mobile information equipment, and accordingly, miniaturization and more dense integration of semiconductor devices have been rapidly advancing. To this end, several proposals have been made. One proposal is bare chip mounting in which a large scale integrated (LSI) circuit chip is mounted directly on a circuit board. Another proposal is to provide a semiconductor device with a so called chip size package (CSP) structure in which the shape of the semiconductor device is made to follow that of the LSI chip as close as possible for miniaturization. In the semiconductor device with this CSP structure, instead of peripheral type electrode arrangement that is common to ordinary LSI chips, area array type electrode arrangement has increasingly been employed, which is advantageous in increasing the number of pins in a rewiring step.
FIG. 16 shows an example of the semiconductor device that is used in conventional bare chip mounting. As shown in FIG. 16, the semiconductor device 109 is formed of a bare chip 119, which is a semiconductor substrate not molded to a resin member, and a plurality of connecting portions 108. As shown in FIG. 17, bare chip 119 is connected via connecting portions 108 to electrodes 120 on a mounting board 121. With this structure, however, large thermal stress is generated due to a difference in thermal expansion between bare chip 119 and mounting board 121, causing damage to connection portions 108, and it is known that connecting portions 108 are unreliable.
Thus, as shown in FIG. 18, the gap between the undersurface of bare chip 119 and the surface of mounting board 121 is generally filled with a resin member 122 (this is called xe2x80x9cunderfillxe2x80x9d) to relax the thermal stress occurring in connecting portions 108.
The conventional semiconductor device 109 described with reference to FIG. 18 above has been proposed with aims to realize high-density mounting as in the bare chip mounting and to improve reliability by decreasing the thermal stress occurring in connecting portions 108 connecting bare chip 119 and mounting board 121. This semiconductor device, however, has the following disadvantages.
Resin member 122 filled in the gap between the undersurface of bare chip 119 and the surface of mounting board 121 makes repair of bare chip 119 extremely difficult, and an additional curing step of the resin increases the manufacturing cost of the semiconductor device. Handling of bare chip 119 itself is also difficult. Due to such reasons, the mounting structure of semiconductor device shown in FIG. 18 has failed to spread despite its possibility of realizing miniaturization and high-density mounting.
In addition, defects or generation of cracks after mounting have been reported. Such a crack would appear, due to strain caused by thermal stress after mounting bare chip 119 to mounting board 121, in an externally connecting interconnection for connecting soldering connecting portion 108 being an externally connecting electrode and an electrode on the semiconductor substrate being an on-chip electrode, and in a connecting interconnection routed from an electrode 120 provided in mounting board 121. In particular, there is a high possibility of breaking of the externally connecting interconnection of the semiconductor device, due to a crack that opens in a boundary between soldering connecting portion 108 (pad) in bare chip 119 as the semiconductor substrate and the externally connecting interconnection.
Further, in the structure of semiconductor device 109 shown in FIG. 16, the externally connecting electrodes have been arranged on bare chip 119 in a matrix. Thus, to route the external connecting interconnections from the electrodes on the semiconductor substrate, or on-chip electrodes, to the externally connecting electrodes being connected to the mounting board, they should be routed with high density along the gaps between the externally connecting electrodes. Accordingly, if the externally connecting interconnections are widened so as to ensure sufficient strength against strain thereof, there may arise a problem of crosstalk due to leakage of signal or generation of noise between circuits.
It is expected that spacing between externally connecting interconnections and the width of the interconnections themselves will be even narrowed, as there are tendencies for the electrode pitch on the semiconductor substrate to be increasingly narrowed, for the number of pins to be increased and for the chip size to be even reduced. Accordingly, there is a demand for a semiconductor device that has an interconnection structure taking into consideration relaxation of not only the stress applied to soldering connecting portions 108 but also the stress applied to the externally connecting interconnections being connected to soldering connecting portions 108. In other words, a semiconductor device is demanded which permits high-density wiring of externally connecting interconnections as in the bare chip mounting, which can be manufactured at the least possible cost, and which provides a mounting structure ensuring reliability not only in a single package, but also after mounting the semiconductor device on a mounting board.
An object of the present invention is to provide a semiconductor device having an interconnection structure that enables high-density wiring and prevents generation of a crack in an externally connecting interconnection being connected to an externally connecting electrode after mounting the semiconductor device on a mounting board.
The semiconductor device according to an aspect of the present invention includes: a substrate; an externally connecting electrode provided in the substrate; and an externally connecting interconnection electrically connected to the externally connecting electrode and routed along a surface of the substrate on which the externally connecting electrode is provided. In the vicinity of a position where the externally connecting interconnection is connected to the externally connecting electrode, a direction in which the externally connecting interconnection is routed has a crossing angle of greater than 0xc2x0 and less than 180xc2x0 with respect to a direction in which the substrate expands and contracts due to thermal stress in the position where the externally connecting interconnection is connected to the externally connecting electrode.
The structure described above exhibits the following effects. Assume that the substrate and another substrate to be electrically connected to the substrate via the externally connecting electrode have thermal expansion coefficients different from each other. In this case, after the substrate is mounted to the another substrate, the externally connecting interconnection in the vicinity of the externally connecting electrode would suffer strain stress of a magnitude corresponding to the difference between the thermal expansion coefficients of the substrate and the another substrate. According to the present invention, however, in the vicinity of the externally connecting electrode, the direction in which the externally connecting interconnection is routed and the direction in which the substrate expands and contracts due to the thermal stress have a certain crossing angle, i.e., they are deviated from each other. Thus, compared to the case where these two directions match with each other, the strain stress that would be applied to the externally connecting interconnection in the vicinity of the externally connecting electrode becomes small. As a result, the adverse effect of such strain stress on the externally connecting interconnection is alleviated, which improves reliability of the semiconductor device after the substrate is mounted to the another substrate. Further, the adverse effect of the strain stress can be prevented without increasing the width of the externally connecting interconnection, so that a semiconductor device having a high-density interconnection structure can be realized.
The semiconductor device according to another aspect of the present invention includes: a substrate having a main surface of a rectangular shape; an externally connecting electrode provided in the substrate; and an externally connecting interconnection electrically connected to the externally connecting electrode and routed along a surface of the substrate on which the externally connecting electrode is provided. In the vicinity of a position where the externally connecting interconnection is connected to the externally connecting electrode, a direction in which the externally connecting interconnection is routed has a crossing angle of greater than 0xc2x0 and less than 180xc2x0 with respect to a direction coupling an intersecting point of diagonal lines of the rectangular shape and the position where the externally connecting interconnection is connected to the externally connecting electrode.
The structure described above has the following effects. Assume again that the substrate and another substrate to be electrically connected to the substrate via the externally connecting electrode have thermal expansion coefficients different from each other. In this case, after the substrate is mounted to the another substrate, the externally connecting interconnection in the vicinity of the externally connecting electrode would suffer strain stress of a magnitude that corresponds to the difference between the thermal expansion coefficients of the substrate and the another substrate. According to the present invention, however, in the vicinity of the externally connecting electrode, the direction in which the externally connecting interconnection is routed and the direction coupling the intersecting point of the diagonal lines of the rectangular shape and the position where the externally connecting interconnection is connected to the externally connecting electrode have a certain crossing angle, i.e., they are deviated from each other. Thus, compared to the case where these two directions match with each other, the strain stress that would be applied to the externally connecting interconnection in the vicinity of the externally connecting electrode becomes small. As a result, the adverse effect of such strain stress on the externally connecting interconnection is alleviated, which improves reliability of the semiconductor device after the substrate is mounted to the another substrate. Further, the adverse effect of the strain stress can be prevented without increasing the width of the externally connecting interconnection, so that a semiconductor device with a high-density interconnection structure can be realized.
In the semiconductor device of the present invention according to either aspect above, at least the externally connecting interconnections connected to the externally connecting electrodes located in four corners of the substrate preferably have the crossing angles of greater than 0xc2x0 and less than 180xc2x0. Such a structure improves reliability of the connections between the externally connecting intersections and the externally connecting electrodes in the four corners where the substrate is most likely to expand and contract due to thermal stress after mounting.
In the semiconductor device of the present invention according to either aspect above, all the externally connecting interconnections placed on the substrate preferably have the crossing angles of greater than 0xc2x0 and less than 180xc2x0. With such a structure, in all the connecting positions between the externally connecting electrodes and the externally connecting interconnections, the strain stress being applied to the externally connecting interconnections can be made small. This suppresses generation of damages in all the externally connecting interconnections, so that the reliability of the semiconductor device is further improved.
In the semiconductor device of the present invention according to either aspect above, the crossing angle is preferably in a range between 45xc2x0 and 135xc2x0. With such a structure, breaking of the externally connecting interconnections can be prevented. Further, the externally connecting interconnections can be placed with the least possible lengths.
In the semiconductor device of the present invention according to either aspect above, the crossing angle is more preferably in a range between 60xc2x0 and 120xc2x0. With such a structure, the possibility of breaking of the externally connecting interconnections can further be reduced, while allowing the wiring thereof with the least possible lengths.
In the semiconductor device of the present invention according to either aspect above, the externally connecting electrodes may be placed near the periphery of the substrate. With such a structure, compared to the case where the connecting electrodes are provided near the center of the substrate, strength of the externally connecting electrode portions against torsion being applied around the central axis of the main surface of the substrate after the substrate is connected to the another substrate is increased.
In the semiconductor device of the present invention according to either aspect above, the externally connecting electrode and the semiconductor substrate may be provided with an insulating member interposed therebetween. The insulating member has an inclined plane with respect to the surface of the substrate on which the externally connecting electrode is provided, and the externally connecting interconnection is formed to follow the inclined plane. Since it is formed along the inclined plane of the insulating member, the externally connecting interconnection has a relatively smooth portion in the vicinity of the position where it is connected to the externally connecting electrode. Accordingly, it is possible to form all the portions of the externally connecting interconnections by deposition and etching of one time.
The semiconductor device of the present invention according to either aspect above may further include: another connecting electrode electrically connected to the externally connecting electrode; another substrate having the another connecting electrode provided therein; and another connecting interconnection having an end connected to the another connecting electrode and routed along a surface of the another substrate on which the another connecting electrode is provided.
In the semiconductor device of the present invention according to either aspect above, in the vicinity of a position where the another connecting interconnection and the another connecting electrode are connected to each other, a direction in which the another connecting electrode is routed may have a crossing angle of greater than 0xc2x0 and less than 180xc2x0 with respect to a direction in which the another substrate expands and contracts due to thermal stress in the position where the another connecting interconnection and the another connecting electrode are connected to each other.
The structure described above exhibits the following effects. In the vicinity of the another connecting electrode, the direction in which the another connecting interconnection is routed and the direction in which the another substrate expands and contracts due to the thermal stress have a certain crossing angle, i.e., they are deviated from each other. Thus, compared to the case where these two directions match with each other, the strain stress being applied to the another connecting interconnection in the vicinity of the another connection electrode becomes small. As a result, the adverse effect of the strain stress on the another connection interconnection is alleviated, so that reliability of the semiconductor device after mounting the substrate to the another substrate is improved.
Preferably, in the semiconductor device of the present invention according to either aspect above, the another substrate has a rectangular shape. In the vicinity of the position where the another connecting interconnection and the another connecting electrode are connected to each other, a direction in which the another connecting interconnection is routed may have a crossing angle of greater than 0xc2x0 and less than 180xc2x0 with respect to a direction coupling an intersecting point of diagonal lines of the rectangular shape of the another substrate to the position where the another connecting interconnection and the another connecting electrode are connected to each other.
The structure described above has the following effects. In the vicinity of the another connecting electrode, the direction in which the another connecting interconnection is routed and the direction coupling the intersecting point of the diagonal lines of the rectangular shape of the another substrate to the position where the another connecting interconnection and the another connecting electrode are connected to each other have a certain crossing angle, i.e., they are deviated from each other. Thus, compared to the case where these two directions match with each other, the strain stress being applied to the another connecting interconnection in the vicinity of the another connecting electrode becomes small. As a result, the adverse effect of the strain stress on the another connecting interconnection is alleviated, so that the reliability of the semiconductor device after mounting the substrate to the another substrate is improved.
Preferably, in the semiconductor device of the present invention according to either aspect above, the substrate may be a semiconductor substrate, and the another substrate may be a mounting board mounting a semiconductor substrate.
The semiconductor device according to a further aspect of the present invention includes: a semiconductor substrate; an externally connecting electrode provided in the semiconductor substrate; an externally connecting interconnection electrically connected to the externally connecting electrode and routed along a surface of the semiconductor substrate where the externally connecting electrode is provided; another connecting electrode electrically connected to the externally connecting electrode; a mounting board provided with the another connecting electrode; and another connecting interconnection having an end connected to the another connecting electrode and routed along a surface of the mounting board on which the another connecting electrode is provided. In the vicinity of a position where the anther connecting interconnection and the another connecting electrode are connected to each other, a direction in which the another connecting interconnection is routed has a crossing angle of greater than 0xc2x0 and less than 180xc2x0 with respect to a direction in which the mounting board expands and contracts due to thermal stress in the position where the anther connecting interconnection and the another connecting electrode are connected to each other.
The structure described above exhibits the following effects. In the vicinity of the another connecting electrode, the direction in which the another connecting interconnection is routed and the direction in which the mounting board expands and contracts due to the thermal stress have a certain crossing angle, i.e., they are deviated from each other. Thus, compared to the case where these two directions match with each other, the strain stress being applied to the another connecting interconnection in the vicinity of the another connecting electrode becomes small. As a result, the adverse effect of the strain stress on the another connecting interconnection is alleviated, so that the reliability of the semiconductor device after mounting the semiconductor substrate to the mounting board is improved.
In the semiconductor device of any aspect, the mounting board may be a dielectric substrate.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.